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Next: Pipeline Architecture Considerations (考慮すべき事項) Up: CPU Architecture (II) - Previous: Speculative Execution (予想実行)

Pipelining (パイプライン処理)



Example: clock frequency = 100 MHz


		 Without pipelining: throughput = 20 MIPS, latency = 50 ns 
With pipelining: throughput = 100 MIPS, latency = 50 ns



 
next up previous contents
Next: Pipeline Architecture Considerations (考慮すべき事項) Up: CPU Architecture (II) - Previous: Speculative Execution (予想実行)
David Asano
2001-05-29