next up previous contents
Next: Two-Bus Architecture (2-バス アーキテクチャ) Up: Overall Computer Structure (コンピュータ全体の構成) Previous: Program Execution (プログラム実行)

One-Bus Architecture (1-バス アーキテクチャ)

A typical one-bus architecture is shown in Figure 1.8. The CPU, memory and I/O subsystem are connected by a single bus.


  
Figure 1.8: A typical one-bus architecture
\includegraphics[width=12cm]{/home/david/courses/comparch/lectures/intro/figs/comp1bus.eps}

$\Rightarrow$ Advantage: simplicity



David Asano
2001-05-29